AI Agents Move Chip Design Earlier, but Verification Still Sets the Pace
Digital twins and AI agents widen early design exploration, while model accuracy and verification remain essential to avoid costly missteps.

AI agents and digital twins are giving chip teams more room to explore design choices before implementation is far along. They can help compare architectures, materials and transistor structures, and let engineers test more options against early models. The tradeoff is that earlier answers are useful only when those models reflect the hardware closely enough to guide decisions. Verification remains central, and the design process may become more iterative as teams learn what their products need.
That was the shared theme in a discussion with Frank Schirrmeister of Synopsys, Ronen Laviv of Hiveware, Jack Berg of Silvaco and Ashish Darbari of Axiomise. Their views point to a shift in what “shift left” can mean: bringing analysis forward still matters, but so does revising choices when new information appears.

From left: Jack Berg of Silvaco, Frank Schirrmeister of Synopsys, Ashish Darbari of Axiomise and Ronen Laviv of Hiveware.
More options, built on harder models
Digital twins are pushing design analysis into earlier stages, Schirrmeister said. That capability is increasingly paired with AI agents and more computing capacity, allowing teams to launch multiple design explorations from an architectural decision. If the models predict real behavior well enough, engineers can compare alternatives before committing to one path.
The modeling challenge extends beyond conventional digital design. Berg pointed to multi-physics models and surrogate models, which approximate the results of more demanding physics calculations in a form designers can use. As chip development involves new materials and transistor structures, teams need data from materials science and physics solvers to build those approximations. Berg said this approach is reaching areas such as complementary field-effect transistors, or CFETs.
Surrogate models can make early exploration faster, but their usefulness depends on how well they represent the underlying system. A model that misses important behavior could lead a team toward a design that fails later, when correction is more expensive. Schirrmeister said engineers have traditionally relied on people to confirm that a model accurately represents what it is meant to simulate. AI agents don't remove that responsibility.
There is a related question of whether agents can reason about a product’s requirements and tradeoffs. Schirrmeister described a “reasoning gap”: tools can generate options and process information, but engineers still need to judge whether an option improves the product. His point is practical. Generating more candidate designs doesn’t automatically make it easier to select the right one.
Verification is part of the early work
Darbari said AI has changed the discussion around shift left, particularly through agent based workflows that examine specifications and help connect requirements to silicon. But teams often lack complete specification documents, complicating any process that depends on extracting requirements from them. Even when an agent produces a promising design change, engineers need a way to determine whether the new version remains functionally correct.
That concern is driving interest in formal verification. Darbari said some customers are asking agents to rewrite existing designs to improve power, performance and area, commonly shortened to PPA. To assess such a change, engineers can use formal methods to prove that the rewritten design behaves equivalently to a reference. The proof gives the team evidence about correctness instead of relying on an agent’s assessment.
In Darbari’s account, large semiconductor companies are adopting agentic workflows and putting significant attention on whether their outputs can be trusted. He sees tool integration as one of the main practical hurdles: verification tools need to fit into the wider design system so that teams can check generated work without creating a disconnected review process.
Earlier analysis can also bring failures to light sooner, but it may create more material for engineers to inspect. Darbari said teams can feed failures from architectural analysis to agents for debugging. The resulting information still needs to produce useful insights, and manual review can become a bottleneck if it grows with the volume of generated output. His assessment is cautious: earlier use of agents could contribute to better designs and fewer escaped bugs, but shifting work earlier alone won’t guarantee that result.
Laviv framed the problem as a continuing effort to identify bottlenecks and move suitable work earlier in design and verification. Agents can help, he said, but solving one constraint can expose another. The practical test is whether a change speeds up the flow as a whole, rather than simply moving a queue of work to an earlier stage.
A less linear design process
Schirrmeister questioned whether the traditional idea of shift left assumes too much certainty. A team might be expected to define a detailed specification far ahead of implementation, even when the eventual workload or product needs are not yet clear. In his view, agent supported modeling could let teams start with a general direction, then refine architectural and implementation decisions as evidence accumulates.
He described a possible choice between using an Arm processor and building around RISC-V, for example, based on what a model suggests about the task. That decision could lead the team to revise its specification. The process is less like completing a fixed sequence and more like returning to earlier decisions as the design takes shape. Schirrmeister characterized this as an agile form of shift left: use early analysis to inform later choices, while keeping room to adjust.
Darbari agreed that not every requirement is known at the outset, especially for new workloads involving machine learning. Still, he said teams generally have a starting point: an existing CPU, GPU or machine learning architecture and a sense of what the next design must do. The unknowns often concern implementation choices involving power and functionality, as well as requirements for training and inference. Agents may help teams evaluate those alternatives faster, but Darbari questioned how quickly their outputs can be reconciled and trusted.
Berg offered a reason that flexibility matters: inverse design can produce an empty set when constraints conflict. A team might ask a solver and surrogate model to produce a transistor, chip or RTL design that meets a set of conditions, only to find that no design satisfies them all. At that point, the constraints or assumptions need to change. An iterative process gives engineers a way to revisit the problem instead of treating the first specification as fixed.
Laviv connected earlier work to the broader verification flow, which can include virtual platforms, formal methods, software simulation, emulation and FPGA implementations. If teams resolve bottlenecks in one part of that flow, they may be able to begin other checks sooner. Earlier emulation or simulation, for instance, can give engineers more time to find issues and revise the design. The value comes from bringing useful evidence into decisions earlier, not from moving every task forward indiscriminately.
Workloads keep architecture choices open
The challenge grows when teams must account for software and several possible uses of a chip. Darbari said some customers are rebuilding architectures from the ground up to support different phases of chip use, including CPU, GPU and machine learning workloads. They need to assess whether a planned design can cover its intended use cases, while considering software behavior, training, inference and power from the architectural stage onward.
For engineers, the emerging benefit is a wider and earlier search through design options. The cost is a greater need to validate models, verify generated changes and decide which results deserve human attention. The next measure of progress will be whether teams can connect those checks into their existing flows, adapt specifications as evidence changes and keep the extra exploration from creating a new review bottleneck. For now, agents can help prepare and compare choices; accountable engineers still have to decide what the evidence supports.
Source: Semiconductor Engineering’s discussion of shift left in chip design.